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  white paper bcmipsxxx ipsec-wp100-r 16215 alton parkway ? p.o. box 57013  irvine, ca 92619-7013  phone: 949-450-8700 fax: 949-450-8710 08/02/02 comparing the perf ormance of broadcom ipsec boards
broadcom corporation p.o. box 57013 16215 alton parkway irvine, ca 92619-7013 ? 2002 by broadcom corporation all rights reserved printed in the u.s.a. broadcom ? and the pulse logo ? are trademarks of broadcom corporation and/or its subsidiaries in the united states and certain other countries. all other trademarks are the property of their respective owners. r evision h istory revision date change description ipsec-wp100-r 08/02/02 initial release
white paper bcmipsxxx 08/02/02 broadcom corporation document ipsec-wp100-d4 page 1 the bcmips200, bcmips300, and bcmips470 devices are broadcom encryption acceleration boards designed for the ipsec protocol. the boards accelerate the des and triple des (3des) bulk encryption algorithms and the sha-1 and md5 authentication algorithms that are used in ipsec protocol. the bcmips200 device is a small form factor 32 bit pci card, capable of 33 mhz and 66 mhz bus operation. the bcmips300 device adds 64 bit, 66 mhz pci operation, and the bcmips470 device improves on the performance of the bcmips300 device. broadcom conducted a test to compare the performance of the different bcmips boards on different speed and bit-width pci busses. all of the tests used 3des encryption and sha1 authentication. as evident from the test data, the encryption of longer packets results in higher throughput. this is because the command overhead is reduced. the control data includes a 4 byte command counter, 32 bytes of command and data pointers per packet, and 80 bytes of key and command definition data. this data crosses the bus one time to the accelerator. the payload crosses the bus two times (in and out), and the authentication operation causes 20 bytes of hash value to be written across the bus. when all of the packets have been processed, a final word is written to indicate completion. this white paper presents the plotted and tabulated board performance test data, the plotted and tabulated comparisons of differences in board performance metrics, a description of the test methodology, and a description of the test system. bcmipsxxx board performance test data . . . . . . . . . . . . . . . . . . . . . . 2 bcmipsxxx board performance metrics . . . . . . . . . . . . . . . . . . . . . . . 3 32 bit/33 mhz pci bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 32 bit/66 mhz pci bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 64 bit/66 mhz pci bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 test methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 measuring encryption throughput . . . . . . . . . . . . . . . . . . . . . . . . . . 4 determining pci bus utilization rate . . . . . . . . . . . . . . . . . . . . . . . . 4 test system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
bcmipsxxx white paper 08/02/02 broadcom corporation page 2 bcmipsxxx board performance test data document ipsec-wp100-d4 bcmipsxxx board performance test data bcmipsxxx board performance test data ipsec accelerator pci speed (mhz) pci bus width (bits) units throughput/bus utilization rate number of bytes per packet 64 128 256 512 1024 2046 4096 8192 bcmips200 33 32 mbps 70 106 140 168 185 193 200 203 %4846464646454545 66 32 mbps 76 113 150 179 197 207 214 218 %3226282625252424 bcmips300 33 32 mbps 81 130 170 215 235 251 262 267 %5355555757575757 66 32 mbps 103 161 211 268 301 316 328 335 %4038373736363636 66 64 mbps 113 179 231 289 324 346 358 365 %3428282624232221 bcmips470 33 32 mbps 99 144 216 301 363 391 420 435 %5656647580808078 66 32 mbps 126 193 282 363 436 476 503 516 %4444464952484946 66 64 mbps 129 205 292 374 442 480 504 518 %3635343333292927 bcmips200 pci 32 bit/33 mhz 0 50 100 150 200 250 100 1000 10000 bytes per packet throughput (mbps) 44 45 46 47 48 49 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips300 pci 32 bit/33 mhz 0 50 100 150 200 250 300 100 1000 10000 bytes per packet throughput (mbps) 52 53 54 55 56 57 58 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips300 pci 32 bit/66 mhz 0 50 100 150 200 250 300 350 400 100 1000 10000 bytes per packet throughput (mbps) 35 36 37 38 39 40 41 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips300 pci 64 bit/66 mhz 0 50 100 150 200 250 300 350 400 100 1000 10000 bytes per packet throughput (mbps) 20 22 24 26 28 30 32 34 36 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips200 pci 32 bit 66/mhz 0 50 100 150 200 250 100 1000 10000 bytes per packet throughput (mbps) 22 24 26 28 30 32 34 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips470 pci 32 bit/66 mhz 0 100 200 300 400 500 600 100 1000 10000 bytes per packet throughput (mbps) 42 44 46 48 50 52 54 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips470 pci 64 bit/66 mhz 0 100 200 300 400 500 600 100 10000 bytes per packet throughput (mbps) 26 28 30 32 34 36 38 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips470 pci 32 bit/33 mhz 0 50 100 150 200 250 300 350 400 450 500 100 1000 10000 bytes per packet throughput (mbps) 55 60 65 70 75 80 85 bus utilization rate (%) throughput (mbps) bus utilization rate (%) bcmips200 boards bcmips300 boards bcmips470 boards
white paper bcmipsxxx 08/02/02 broadcom corporation document ipsec-wp100-d4 bcmipsxxx board performance metrics page 3 bcmipsxxx board performance metrics the throughput and the bus utilization rate at a given bit width and speed of the pci bus is different for each of the bcmips boards. the compared differences in throughput and the bus utilization rate between the bcmips470 board and the bcmips200 board, between the bcmips470 board and the bcmips300 board, and between the bcmips300 board and the bcmips200 board are illustrated and tabulated below. 32 bit /33 mh z pci bus  32 percent higher maximum throughput for the bcmips300 board compared to the bcmips200 board.  114 percent higher maximum throughput for the bcmips470 board compared to the bcmips200 board.  63 percent higher maximum throughput for the bcmips470 board compared to the bcmips300 board.  19 percent higher maximum bus utilization rate for the bcmips300 board compared to the bcmips200 board.  67 percent higher maximum bus utilization rate for the bcmips470 board compared to the bcmips200 board.  40 percent higher maximum bus utilization rate for the bcmips470 board compared to the bcmips300 board. 32 bit /66 mh z pci bus  54 percent higher maximum throughput for the bcmips300 board compared to the bcmips200 board.  137 percent higher maximum throughput for the bcmips470 board compared to the bcmips200 board.  54 percent higher maximum throughput for the bcmips470 board compared to the bcmips300 device.  25 percent higher maximum bus utilization rate for the bcmips300 board compared to the bcmips200 board.  63 percent higher maximum bus utilization rate for the bcmips470 board compared to the bcmips200 board.  30 percent higher maximum bus utilization rate for the bcmips470 board compared to the bcmips300 board. 64 bit /66 mh z pci bus  42 percent higher maximum throughput for the bcmips470 board compared to the bcmips300 board.  6 percent higher maximum bus utilization rate for the bcmips470 board compared to the bcmips300 board. difference in throughput between bcmips boards at a given pci bus bit width and speed 63% 54% 42% 114% 137% 32% 54% 0% 20% 40% 60% 80% 100% 120% 140% 160% 32/33 32/66 64/66 pci bus bit width/speed compared difference in throughput (%) ips470:300 ips470:200 ips300:200 difference in bus utilization rate between bcmips boards at a given pci bus bit width and speed 40% 30% 6% 67% 63% 19% 25% 0% 10% 20% 30% 40% 50% 60% 70% 32/33 32/66 64/66 pci bus bit width/speed compared difference in bu s utilization rate (%) ips470:300 ips470:200 ips300:200
document ipsec-wp100-d4 broadcom corporation 16215 alton parkway p.o. box 57013 irvine, ca 92619-7013 phone: 949-450-8700 fax: 949-450-8710 broadcom ? corporation reserves the right to make changes without further notice to any products or data herein to improve reliability, f unction, or design. information furnished by broadcom corporation is believed to be accurate and reliable. however, broadcom corporation does not assume any liability arising out of the application or use of this information, nor the application or use of any prod uct or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. bcmipsxxx white paper 08/02/02 t est methodology m easuring encryption throughput broadcom measured the encryption throughput by running a series of packets through the accelerator (all with the same payload length), measuring the time between command submission and completion, and dividing the time by the number of packets. the typical number of packets is 64, though for the longer records (> 1024 bytes), the number of packets is 10. d etermining pci bus utilization rate broadcom determined the bus utilization rate by running a very long sequence of packets of the indicated size through the accelerator and using a vmetro pbt-615 bus analyzer to measure the pci bus utilization. the bus utilization rate (expressed as a percentage) is the ratio of the amount of time that the host and the accelerator have control of the pci bus and the total time. t est system the system used to test the bcmipsxxx boards is based on a 1 ghz pentium ? iii processor, mounted onto an intel ? server motherboard (g7esz) using the serverworks ? chipset, and 512 mb ram. the operating system is red hat ? linux ? 7.1 distribution with the broadcom bcm582x device driver. to reduce the number of bus transactions, the stock device driver was modified to poll completion status rather than device status. this modification will be introduced into future device drive r releases. also, the driver was modified to repeat a single en cryption operation 1 million times (simulating a steady-state system) for the purpose of measuring bus utilization.


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